Common Problems in FPC Circuit Design
Published on 12/24/2018 5:45:56 PM
Description
<p><span style="display:none;"></span> </p><style>.e_editor{font:14px/24px Roboto,Helvetica,Tahoma,Arial,'Microsoft YaHei','b8bf53';}.e_editor div,e_editor p,e_editor td,e_editor th,e_editor li{font-weight:inherit;font-size:inherit;font-style:inherit;font-family:inherit;}.e_editor ul{margin:-10px 0 20px;}.e_editor li{padding:5px 0;}.e_table{width:96%;border-collapse:collapse;empty-cells:show;}.e_table th,.e_table td{padding:5px;border:2px solid #eee;}.e_img{padding:10px 0;text-align:center;}.e_p{line-height:20px;padding:0 0 20px;text-indent:0em;}</style><p><span style="font-family:"font-size:16px;text-indent:0em;"><span style="font-family:"font-size:16px;">In our production processing, first we will have to check if the </span><a href="https://www.allpcb.com/sns/gerber-file_45/" target="_blank"><span style="font-family:"font-size:16px;">Gerber files</span></a><span style="font-family:"font-size:16px;"> provided by customers are in good format and correct for manufacturing, and we often find there are different kinds of problems in design. There are some common problems in the designs.</span></span> </p><p><span style="font-family:"font-size:16px;text-indent:0em;"><br/></span> </p><p><strong><span style="font-size:16px;font-family:"">1. </span><span style="display:none;"></span><span style="font-size:16px;font-family:"">The Overlap of the Pads</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">1) The overlap o</span><span style="display:none;"></span><span style="font-size:16px;font-family:""><span style="font-family:"font-size:16px;">f the</span><strong><span style="font-family:"font-size:16px;"> pads</span></strong><span style="font-family:"font-size:16px;"> (except for the surface mount pads) means the overlap of the holes. In the drilling process, the drill bit is broken due to multiple holes in one hole, most likely resulting in damage to the holes.</span></span> </p><p><span style="font-size:16px;font-family:"">2) The two holes in the multi-layer board overlap, for example, one hole is the isolation plate, and the other hole is the connection plate (flower pad), so that the negative film is formed as a spacer disk,as a result, resulting in scrapping.</span> </p><p><strong><span style="font-size:16px;font-family:"">2. The Abuse of the Graphics Layer</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:""><span style="font-family:"font-size:16px;">1) Some useless connections were made on some </span><strong><span style="font-family:"font-size:16px;">graphics layers</span></strong><span style="font-family:"font-size:16px;">. The original four-layer board was designed with five or more layers, which caused misunderstanding to manufacturers.</span></span> </p><p><span style="font-size:16px;font-family:"">2) Sometimes to save trouble or time on design making, take Protel software as an example to use the Board layer to draw the lines of each layer, and use the Board layer to draw the line, so when the light drawing data, because the Board layer is not selected, missed Wired and disconnected, or shorted by selecting the labeling line of the Board layer, so the design layer is kept intact and clear.</span> </p><p><span style="font-size:16px;font-family:"">3) Contrary to the conventional design, such as the component surface design in the Bottom layer, the welding surface design in the Top,this definitely causing inconvenience or confusions.</span> </p><p><strong><span style="font-size:16px;font-family:"">3. The Wrong Placement of Characters(Letters)</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:""><span style="font-family:"font-size:16px;">The character cover pad SMD soldering piece brings inconvenience to the on-off test of the printed board and the soldering of the component. Which can often happens in </span><a href="https://www.allpcb.com/drilling_pcb_design.html" target="_blank"><span style="font-family:"font-size:16px;">PCB design</span></a><span style="font-family:"font-size:16px;">, and most of case, manufacturers will ignore the characters which on SMD pads.</span></span> </p><p><br/></p><p><img src="https://file.allpcb.com/bbs/18/12/24/171715495.png" alt="smd pads"/> </p><p><br/></p><p><span style="font-size:16px;font-family:"">Or some printings are even overlapped, which make confusion to manufacturers how to make the characters.</span> </p><p><br/></p><p><img src="https://file.allpcb.com/bbs/18/12/24/171738360.png" alt="pcb printing"/> </p><p><strong><br/></strong> </p><p><strong><span style="font-size:16px;font-family:"">4. The Character Design not in a Appropriate Size</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">If it is too small, causing the difficulty of screen printing, or it will be printed out not clearly at all. Or it is too large,this will make the characters overlap each other, and difficult to distinguish it.</span> </p><p><strong><span style="font-size:16px;font-family:"">5. The Single-sided Pad Aperture Setting</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">1) Single-sided pads are generally not drilled. If the holes are to be marked, the aperture should be designed to be zero. If a numerical value is designed such that when the drilling data is generated, the coordinates of the hole appear at this position, and a problem occurs.</span> </p><p><span style="font-size:16px;font-family:"">2) Single-sided pads such as drilled holes should be specially marked.</span> </p><p><strong><span style="font-size:16px;font-family:"">6. Draw Pads with Padding</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">Draw a pad with a pad to pass the DRC check when designing the line, but it is not suitable for processing. Therefore, the pad cannot directly generate solder resist data. When the solder resist is applied, the pad area will be covered by the solder resist, resulting in the device is difficult to solder.</span> </p><p><strong><span style="font-size:16px;font-family:"">7. The Electric Ground Layer is a Flower Pad and a Connection</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">Because the power is designed as a flower pad, the ground plane is the opposite of the image on the actual printed board, and all the connections are isolated lines. This should be very clear to the designer. By the way, when drawing several sets of power supplies or isolation lines of several grounds, care should be taken not to leave a gap, so that the two sets of power supplies are short-circuited, and the area of the connection cannot be blocked (so that a group of power supplies are separated).</span> </p><p><strong><span style="font-size:16px;font-family:"">8. The Definition of Processing Level is not Clear</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">1) The single-panel design is in the TOP layer. If you do not explain the positive and negative, the board may not be soldered.</span> </p><p><span style="font-size:16px;font-family:"">2) For example, a four-layer board design uses four layers of TOP mid1 and mid2 bottom, but the processing is not performed in this order, which requires explanation, otherwise it will be made incorrectly.</span> </p><p><strong><span style="font-size:16px;font-family:"">9. Too Many Filler Blocks in the Design or Filled Blocks Filled with very Thin Lines</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">1) The phenomenon that the light drawing data is lost is lost, and the light drawing data is not complete.</span> </p><p><span style="font-size:16px;font-family:"">2) Because the filling block is drawn by lines one by one during the processing of the light drawing data, the amount of light drawing data generated is quite large, which increases the difficulty of data processing.</span> </p><p><strong><span style="font-size:16px;font-family:"">10. Surface Mount Device Pads are too Short</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">This is for the on-off test. For a surface-mount device that is too dense, the spacing between the two legs is quite small, and the pads are quite thin. The test pins must be mounted up and down (left and right), such as pads. The design is too short, although it does not affect the device installation, it will make the test pin wrong.</span> </p><p><strong><span style="font-size:16px;font-family:"">11. The Spacing of Large Area Grid is too Small</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:""><span style="font-family:"font-size:16px;">The edge between the </span><strong><span style="font-family:"font-size:16px;">large-area grid lines</span></strong><span style="font-family:"font-size:16px;"> and the same line is too small (less than 0.3mm). During the manufacturing process of the printed board, the image transfer process is likely to cause a lot of broken film to adhere to the board after the completion of the shadow, causing the broken line.</span></span> </p><p><strong><span style="font-size:16px;font-family:"">12. The Distance Between the Large Area of Copper Foil and the Outer Frame is too Close.</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">The large-area copper foil should be at least 0.2mm or more from the outer frame, because it is easy to cause the copper foil to rise and the solder resist off due to the milling to the copper foil.</span> </p><p><strong><span style="font-size:16px;font-family:"">13. The Shape of the Border Design is not Clear</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">Some customers have designed outline lines in Keep layer, Board layer, Top over layer, etc. These outline lines do not overlap, which makes it difficult for PCB manufacturers to judge which outline line is subject to. And some customers add routing big in the gko layer, without define the board shape based on middle of the routing or inner edge of the board routing.</span> </p><p><br/></p><p><img src="https://file.allpcb.com/bbs/18/12/24/171827211.png" alt="outline lines"/> </p><p><strong><br/></strong> </p><p><strong><span style="font-size:16px;font-family:"">14. Uneven Graphic Design</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">Some designs with uneven graphic,In the case of pattern plating, the plating is uneven and affects the quality of the boards.</span> </p><p><strong><span style="font-size:16px;font-family:"">15. Apply Grid Lines when the Copper Area is too Large to Avoid Foaming During SMT.</span></strong> </p><p><strong><br/></strong> </p><p><span style="font-size:16px;font-family:"">When the copper area is too large in one board, it is suggested to apply grid lines on that areas so as to avoid the risk of foaming in the board during assembly.</span> </p><p><br/></p>
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