ALLPCB
Overview
This article summarizes three key challenges in wafer-level, high-volume manufacturing (HVM) testing for 5G devices, based on a discussion by Daniel Bock and Jeff Damm of FormFactor. As with other technology transitions, deploying 5G at scale requires supporting test and measurement solutions that align with advances in chip technology and manufacturing processes while keeping cost and performance commercially viable.
1. Higher frequencies mean more channels per device
The first major shift affecting test equipment is the introduction of new high-speed channels with operating frequencies approaching 70 GHz. Traditional HVM wafer testers typically reach about 6 GHz, covering the bands used by 4G. Those testers can be extended with custom modules to reach higher frequencies and add one or two channels, but emerging 5G devices will include much higher channel counts. Each device under test (DUT) may include up to 64 RF channels. Because of frequency limits, legacy testers may not be the optimal solution.
Semiconductor manufacturers are seeking new test solutions that provide more mmWave channels rather than relying solely on existing off-the-shelf testers. Expanding source-measure units (SMUs) to support this could be one approach, but any developed tester must remain cost-effective for production test. Adding many high-frequency channels could increase tester cost by an order of magnitude or more.
2. Increased parallelism
Higher parallelism also drives the need for multi-site RF testing. Mobile RF systems-on-chip (SoC) are currently tested in x4 multi-site wafer tests, with x8 fully parallel testing desired where possible. For many devices under development, x8 parallelism pushes total RF channel counts above 256 channels. Building a tester that directly connects to that many RF channels is impractical for two reasons: cost and space constraints on the test floor.
Today, many 5G test setups increase total channel count by augmenting large ATE testers using other methods. These can include balun converters, power combiners, switches, and loopback tests, often implemented as part of device-specific probe cards.
3. Verifying signal accuracy
The final requirement for 5G components is accurate RF testing at the wafer test stage. Accurate RF measurements both validate RF performance and help prevent bad parts from being packaged. High-speed signals in 5G make DUTs more sensitive to process variations, especially early in technology development, which typically lowers yields and strengthens the case for wafer-level RF classification.
To support high signal integrity, measurement errors such as impedance mismatch, cable loss, and RF source drift—errors that may be negligible at lower frequencies—become significant at millimeter wavelengths. Performing simultaneous multi-site calibration during multi-DUT testing provides the best electrical accuracy because all DUT RF channels are placed in a known, controlled state.
Approaches under investigation
FormFactor has been investigating cost-effective mmWave testing options that intelligently optimize test resources between the tester and the probe card to support higher RF-channel parallel testing. Approaches under consideration include upconverters/downconverters that translate between RF and IF signals, commercial off-the-shelf (COTS) switches for economical signal routing, and power dividers capable of feeding multiple channels in parallel.
In the foreseeable future, wafer-level production testers for 5G are expected to routinely measure on the order of hundreds of RF channels in a single run—potentially up to 240 RF channels. Currently, no production tester handles such high channel counts directly. Using traditional test system architectures, the cost of calibrating, generating, and transporting that many signals between instruments and DUTs is prohibitive, so alternative architectures that optimize the distribution of test resources are required.
