ALLPCB
Introduction
With the development of the Internet of Things, wearable products have become widespread. Wearable health monitors can measure multiple key physiological parameters at any time, alert when values are abnormal, and transmit measurements to professional equipment or personal mobile phones. Various wearable health monitors are already available, including heart-rate monitors, blood-pressure monitors, body-fat analyzers, and sleep trackers. This article describes the application of Cypress PSoC BLE in wearable heart-rate monitors.
Why a wearable heart-rate monitor
Heart rate is the number of heartbeats per unit time. It is an important parameter for assessing cardiac function and an indicator of physical and mental exertion. Designing a wearable device that can continuously record, display, and store heart-rate values, communicate with a mobile phone via Bluetooth, resist interference, and alert when values exceed normal ranges is therefore useful.
Design challenges
Designing a heart-rate monitor typically involves the following challenges:
- Low-power Bluetooth communication to exchange data with a mobile phone, provide timely feedback to the user, and allow configuration via the phone.
- Use of an analog front end (AFE) and filter circuits to measure the heart-rate signal. ADC sampling accuracy significantly affects measurement accuracy.
- Providing user input interfaces such as buttons or capacitive touch controls.
- Driving a segmented LCD to display the measured heart rate.
- Achieving low power consumption to extend standby time so the device can be powered by a button cell battery.
Platform overview: Cypress PSoC BLE
The Cypress PSoC BLE family addresses these design requirements with a single-chip BLE solution. The PSoC 4 platform is a scalable, reconfigurable architecture based on an ARM Cortex-M0 MCU. It combines programmable analog and digital blocks with flexible routing resources. PSoC BLE devices integrate a low-power Bluetooth microcontroller, radio, and subsystem, along with digital programmable logic, high-performance ADC, op-amps in comparator mode, and standard communications and timing peripherals.
On-chip programmable op-amps and SAR ADCs can be used for heart-rate signal detection and filtering. The product integrates a CapSense user interface supporting capacitive touch buttons, sliders, and touchpads, and it also includes a segmented LCD driver for displaying heart-rate values. Five configurable low-power modes are available to extend standby time for low-power applications. An integrated BALUN simplifies antenna design. The graphical PSoC Creator development tool provides a visual development environment to simplify development and reduce time to market.
Summary
The PSoC BLE family can be used as a single-chip foundation for wearable heart-rate monitors, integrating radio, MCU, analog front end, touch interfaces, and display drivers while offering configurable low-power modes to support battery-powered operation.
