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The global market for AI smart glasses remains small, with 2024 sales reaching only 1.52 million units compared to 190 million wrist-worn devices and 330 million TWS earbuds. However, growth potential is significant, with projections estimating 3.5 million units by 2025 and up to 1.4 billion by 2035, a 921-fold increase.
Chip Industry Accelerates AI Glasses Development
The AI smart glasses supply chain is rapidly evolving, particularly in upstream chip development, where companies are introducing new products. Intellectual property (IP) cores, critical to chip design, are seeing advancements from firms like VeriSilicon and Allwinner Technology.
VeriSilicon¡¯s Low-Power IP Solutions
VeriSilicon, a leading semiconductor IP provider, offers ultra-low-power IP and DDR-Less technology for wearable devices. Over 30 smartwatch SoC clients have licensed VeriSilicon¡¯s low-power IP, and AI/AR glasses manufacturers are also collaborating with the company.
VeriSilicon¡¯s wearable solutions use a tightly coupled architecture, integrating pixel processing and system interconnect IPs. Its FLEXA IP and DECNano data compression technologies address low-power and low-bandwidth needs. In April 2025, VeriSilicon launched GCNano3DVG, a low-power GPU IP supporting 3D and 2.5D graphics rendering.
Allwinner Technology¡¯s SoC Innovations
Allwinner Technology specializes in SoC chips for IoT hardware, leveraging self-developed IP and design expertise. Its portfolio includes camera, HMI, and low-power Bluetooth chips, with over 60 circuit design IP cores and multiple system platform IPs across seven core technology categories. Over 75% of its chip IP is proprietary.
In early 2025, Allwinner introduced the KM01W, a low-power vision chip for AI glasses, integrating ISP, NPU, Wi-Fi, and BLE modules. This chip supports image processing, edge AI inference, and wireless connectivity. A development platform based on KM01W is now available, indicating mature IP integration.
Allwinner¡¯s Always-On Video (AOV) technology enables cameras to capture high-frequency snapshots in idle mode, using on-device AI to analyze images and switch to full recording when events are detected, ensuring long battery life.
Addressing Performance Challenges
As AI/AR glasses gain functionality, they face trade-offs between performance, weight, and battery life. VeriSilicon emphasizes system-level optimization, focusing on data path compression and fine-grained power management. Allwinner notes that SoC design complexity stems from heterogeneous integration, requiring CPUs, DSPs, memory controllers, I/O interfaces, and power management within a single chip.
Actions Technology¡¯s High-Performance Chips
Actions Technology offers proprietary IP and highly integrated SoC designs. Its first-generation chip, featuring a triple-core architecture (CPU, DSP, NPU), includes a compute-in-memory (CIM) NPU delivering 100 GOPS. In 2024, Actions began developing second-generation CIM IP, aiming to triple NPU performance to 300 GOPS and improve energy efficiency from 6.4 TOPS/W to 7.8 TOPS/W at INT8. The company is also enhancing low-static-power IP for sensor-hub applications in wearables.
Outlook for AI/AR Glasses
Advancements in proprietary IP are enabling chip companies to address the technical challenges of AI/AR glasses, driving innovation and market growth. These developments position the sector for significant expansion in the coming years.
