Ways to optimize PCB layout on CAD packa

2/28/2017 11:23:38 PM

If PCB board size is my constraint ....and I have designed my circuit ...

1. How to optimize the layout of design for smaller space? 2. How to run simulations if any to do intelligent SI test?

Does packages by Cadence, Mentor support this kind of optimisation of layout?

Bowen

3/2/2017 11:23:38 PM

Remarkable.It help me a lot. Thank you.

Mario

3/2/2017 11:23:38 PM

Perfect post that I need. Enjoy reading it.

Bernard REMOND

3/2/2017 11:23:38 PM

Useful!

Andrew

3/2/2017 11:23:38 PM

My friends and I have learned a lot with your post. And we will keep on following you for the further study.Hope your next article will come soon.