Ways to optimize PCB layout on CAD packa

2017/2/28 23:23:38

If PCB board size is my constraint ....and I have designed my circuit ...

1. How to optimize the layout of design for smaller space? 2. How to run simulations if any to do intelligent SI test?

Does packages by Cadence, Mentor support this kind of optimisation of layout?

Bowen

2017/3/2 23:23:38

Remarkable.It help me a lot. Thank you.

Mario

2017/3/2 23:23:38

Perfect post that I need. Enjoy reading it.

Bernard REMOND

2017/3/2 23:23:38

Useful!

Andrew

2017/3/2 23:23:38

My friends and I have learned a lot with your post. And we will keep on following you for the further study.Hope your next article will come soon.