Achieving accurate response in the time domain for pcb interconnects at data rates of more than 1 Gb/s is no mean feat for time-domain simulators — but Agilent Technologies Inc. is claiming a breakthrough in high-frequency Spice simulation technology in the form of its Signal Integrity Designer Premier suite, which is part of the Advanced Design System.
To address the challenging technical problem of time-domain accuracy at high data rates, Agilent has developed a convolution simulator that can automatically enforce passivity on S-parameter models. The simulator can accurately determine the causal time-domain response, which represents the original S-parameter data.
Signal Integrity Designer Premier also provides two additional capabilities that are important for accurate high-speed digital design:
a new, fully integrated set of IBIS (I/O Buffer Information Specification) models for single-ended and differential components such as sources, buffers and terminations; and
a broadband Spice model generator.
IBIS models describe the behavior of circuits when triggered by waveforms. They eliminate the need to obtain the often proprietary transistor-level details of components. The broadband Spice model generator automatically processes frequency-domain data produced by electromagnetic structure simulators such as Agilent's Momentum, a 3D planar electromagnetic simulator, and Electromagnetic Design System (EMDS), Agilent's full 3D EM simulator, or by measuring with a vector network analyzer to create models that are accurate over a broad band of frequencies and are usable by a time-domain simulator.
Signal Integrity Designer suites are expected to be available in February 2007, with prices starting at approximately $25,000. For more information, visit Agilent Technologies.