Microcontroller Architectures and Instruction Sets

Overview

The small microcontroller, which appears simple, is actually quite complex. This article provides a concise introduction to microcontroller architectures and instruction set concepts.

Instruction Sets

What an instruction set represents

An instruction set is the collection of instructions in a CPU used for computation and control of a computer system. The design and features of an instruction set affect CPU performance and serve as an important indicator of CPU capability.

An instruction set also acts as a standard for chip design teams and compiler developers. Because chips and IDEs follow the same instruction set standard, programs written in high-level languages and compiled with a compatible compiler can run directly on the corresponding CPU; otherwise they will not run. For example, a program compiled with arm-linux-gnueabihf-gcc cannot run on an x86 CPU.

Classification of instruction sets

Among mainstream architectures, instruction sets are generally classified into Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing (RISC).

Complex instruction sets

CISC emphasizes rich hardware functionality for executing instructions, which leads to complex hardware structures. CISC characteristics include variable instruction lengths and multi-cycle execution. They often provide many special-purpose registers, and the processor can operate directly on register data. CISC is mainly used in general-purpose computer processors; x86 in personal computers is a typical example.

Reduced instruction sets

RISC emphasizes simpler structure and faster execution. Typical RISC characteristics include single-cycle execution per instruction where possible, fixed instruction lengths, and the composition of simple instructions to perform complex operations. Registers are usually general-purpose. RISC is commonly used in embedded processors. Well-known RISC instruction sets include ARM, MIPS, and RISC-V.

Common RISC instruction sets

ARM

The ARM instruction set is widely used. The ARM family accounts for a large share of 32-bit embedded processors. ARM processors are pervasive in embedded system design due to low power consumption, making them suitable for mobile communications.

ARM cores are found in many consumer electronic devices such as portable devices (PDAs, mobile phones, multimedia players, handheld game consoles), computer peripherals (hard drives, desktop routers), and certain military avionics computers.

ARM has evolved through many versions:

• ARMv1: Initial version with a 26-bit address space (64 MB); not commercialized.
• ARMv2: Added multiply instructions and coprocessor support.
• ARMv3: Implemented a 32-bit address space.
• ARMv4: Added halfword load/store, processor system mode, and the Thumb instruction set.
• ARMv5: Added DSP and Java-related instructions.
• ARMv6: Added over 60 SIMD instructions.
• ARMv7: Introduced NEON technology, improving DSP and media processing capabilities and supporting improved floating-point operations.
• ARMv8: Introduced the 64-bit instruction set and increased registers to 31.

MIPS

MIPS emphasizes co-design of hardware and software to improve performance while simplifying hardware design. The instruction set evolved through MIPS I to MIPS V for general-purpose processors and MIPS16, MIPS32, and MIPS64 for embedded systems. In embedded applications, MIPS K-series microprocessors have been widely used across game consoles, routers, laser printers, and handheld devices.

RISC-V

RISC-V (pronounced "RISC-five") is an open instruction set architecture based on RISC principles. RISC-V was designed for small, fast, and low-power implementations without prescribing a specific microarchitecture.

Unlike architectures such as x86 and ARM, which retain legacy definitions to preserve backward compatibility and thus carry many legacy instructions, RISC-V was designed to be minimal and clean. The base RISC-V instruction set contains only around 40 instructions, with additional modular extensions available as needed.

Key features of RISC-V include:

• Open source licensing under a permissive BSD-like license, allowing companies to use the ISA freely and to add private instruction extensions without being required to open them.
• Simple architecture: a minimal base instruction set that can be extended modularly.
• Portability: detailed privilege and user-level specifications make it convenient to port Linux and other Unix-like systems to RISC-V platforms.
• Modular design: different parts are organized modularly, allowing designers to select and combine modules to meet custom device requirements.
• Complete toolchains: a growing ecosystem provides toolchains and development tools for chip designers.

Microarchitecture

The instruction set is a deep concept; related to it is microarchitecture. Microarchitecture refers to the hardware implementation of a processor core. For example, the STM32F103 uses an ARM Cortex-M3 core, which is an example of a microarchitecture.

The same instruction set can support multiple microarchitectures. Different microarchitectures can be designed from the same instruction set to meet different goals such as high performance or low power consumption. In embedded systems, a common example is the ARMv7-based Cortex series cores.

ARM licensing models

ARM does not manufacture chips; it generates revenue through IP licensing. ARM licensing is generally offered at three levels:

1. Architectural-level license

An architectural-level license allows a chip vendor to pay for the instruction set license and then design its own core based on that ISA. Only a few major handset silicon vendors typically obtain architectural-level licenses. Examples of companies that have designed their own microarchitectures include:

• Apple: Swift architecture.
• Qualcomm: Krait and Scorpion microarchitectures.
• Samsung: Mongoose microarchitecture.
• Huawei: historically used reference ARM microarchitectures rather than a fully custom microarchitecture.

Some vendors that previously combined ARM reference designs with proprietary microarchitectural elements have shifted toward using ARM's public microarchitectures alone. Apple remains an example of a company that has pursued extensive in-house CPU design based on ARM architecture.

1. Core-level license

Core-level licensing allows vendors to purchase ARM-designed microarchitectures and integrate them with their own peripheral modules to create complete chips. For example, STMicroelectronics licensed the Cortex-M3 core and added peripherals such as timers, ADCs, and SPI to produce the STM32F103 series. Many vendors use ARM core-level licenses.

1. Use-level license

A use-level license permits the use of packaged ARM processor cores without modification. This lowest licensing tier allows customers to buy ready-made ARM cores. To add additional capabilities, vendors typically combine the core with external DSPs or perform chip-level packaging adaptations.