ALLPCB
Overview
Zynq-7000AP SoC uses the on-chip CPU to assist configuration. Without an external JTAG, the processing system (PS) and the programmable logic (PL) rely on the PS to complete device initialization. Zynq supports two boot modes: active boot from Boot ROM and passive boot from JTAG.
Boot Stages
The Zynq boot process is hierarchical. Although at least two steps are required, it is commonly described in three stages:
- Stage 0: Boot ROM, which controls initial device startup.
- Stage 1: First-stage bootloader (FSBL), which can be user-controlled code.
- Stage 2: User application running on PS or an optional second-stage bootloader (SSBL).
External Boot Conditions
Several external conditions affect Zynq startup:
- Power: During Stage 0 Boot ROM, PS and PL power requirements must be met.
- Clock: Clocking requirements must be satisfied.
- Reset: Two external reset sources influence Boot ROM execution: power-on reset and system reset signals.
- Boot pins: Boot mode pins must be set correctly to select the boot source.
Stage 0: Boot ROM
Boot ROM contains immutable code that runs on the ARM core after power-up or warm reset when JTAG is not used. This code initializes basic peripheral controllers for NAND, NOR, Quad-SPI, SD, and PCAP so the ARM core can access those peripherals. Other peripherals such as DDR are initialized in Stage 1 or later. Boot ROM also loads the Stage 1 boot image.
The PS boot source is selected by the external mode pins, so Boot ROM will load the Stage 1 image from different external memories according to the boot pin settings. Boot ROM prepares PL configuration but does not perform PL configuration itself.
Stage 1: FSBL
The FSBL is the bootloader launched after Boot ROM. It is loaded into OCM or can run directly from linear flash. FSBL typically performs the following tasks:
- Initialize the PS according to platform configuration.
- Configure the PL using a bitstream file.
- Load the second-stage bootloader (SSBL) or a bare-metal application into memory.
- Jump to the SSBL or the bare-metal application.
Note: FSBL does not enable the MMU before jumping to SSBL or a bare-metal application, because many operating systems, such as Linux, expect the MMU to be disabled at startup.
PL configuration during FSBL is optional. The Zynq platform can be treated as two standalone ARM cores if PL is not configured. PL bitstreams, SSBL images, and bare-metal applications must be organized as flash partition images. FSBL traverses the partition table to locate bitstreams, SSBL, or applications and loads or configures them accordingly. The SDK provides tools to generate flash partition images.
Stage 2: SSBL
Second-stage bootloader (SSBL) is optional. The SSBL is commonly called the BootLoader. For Linux systems on Zynq, U-Boot typically serves as the SSBL. FSBL helps load U-Boot into the ARM cores. U-Boot provides commands for memory and flash access, USB device support, and performs necessary hardware initialization before the Linux kernel starts, such as serial and DDR controller setup.
Linux Boot Process on Zynq
From a software perspective, embedded Linux can be divided into bootloader, Linux kernel, filesystem, and applications. On Zynq, FSBL loads U-Boot into memory. U-Boot initializes memory and essential peripherals, sets boot parameters, and copies the device tree blob into memory. Parameters passed to the kernel normally include the device tree address and filesystem type and location. U-Boot then transfers control to the Linux kernel.
After the kernel takes control, it initializes its runtime environment and sets up virtual-to-physical address mapping. Device drivers are initialized and filesystems are mounted. Device information provided through the device tree allows kernel drivers to bind to PL IP cores; drivers for PL IP can be loaded as modules after Linux boots. The kernel uses parameters from U-Boot to select the filesystem format and mount point. The kernel then runs init(), which is the endpoint of kernel boot and the start point for all user processes. Applications reside within the filesystem.
