We are developing a new product, and some of the designers are proposing QFN packages. These look like leadless QFP's. We don't currently use anything like this, but we operate in a high reliability a... (See More)
Hi. We are designing in a 128 pin LQFP that has a heat sink in the center of the package. The size of this is 7.44 by 7.55 mm.
Can anyone recommend what pad size should be on the board for this?... (See More)
In one integrated environment, designers can now implement gigabit serial interfaces in high-speed printed-circuit-board (PCB) systems. Version 15.0 of Cadence's packaging design environment includes ... (See More)
Hi: I'm looking for input from anyone who has experience assembling the MLP package on PCBs. We are experiencing solder opens after assembly, and I'm curious to see how others are processing these cri... (See More)
To err is human. And to order the wrong component foot print is just part of engineering. It happens to us all; You’re working hard to finish a design, you have PCBs on the way and you’re putting in y... (See More)
Hi, We have encountered one serious problem that heavy packages falling down during second side reflow, especially for PLCC 84. I believe it caused by temperature profile setting. Any good suggestion ... (See More)
Multitest, a designer and manufacturer of final test handlers, contactors and load boards used by integrated device manufacturers(IDMs) and final test subcontractors worldwi... (See More)
To help automate the interconnect process between bare die and a pc board, PowerBGA 3.0 provides flip chip design tools, support for design reuse methodologies with a new physical design reuse (PDR) m... (See More)
This technical brief discusses thermal design techniques for IC packages—such as QFN, DFN, and MLP—that incorporate an exposed thermal pad.
Most designers are by now quite familiar with integrat... (See More)