ALLPCB
DDR vs SDRAM: Functional and Structural Differences
Deep dive DDR vs SDRAM internals: block diagrams, differential clock/DQS, DLL, 2n prefetch, tDQSS, mode registers and timing differences.
SRAM Power and Performance Challenges in Advanced Nodes
Explore SRAM scaling limits, SRAM vs DRAM trade-offs, chiplet and alternative memory strategies, and architectures to meet AI memory demands.
Common Memory Types and Their Applications
Guide to NAND, DDR/LPDDR, eMMC vs UFS and eMCP/uMCP: memory types, uses, performance and trends for mobile, enterprise and storage.
SRAM Storage Capacity and Key Characteristics
Explore SRAM storage capacity, key characteristics, advantages, and applications like cache memory in this detailed guide.
Memory-Compute Integrated Architectures: Benefits & Types
Explore memory-compute integration: PIM/PNM/CIM advantages, industry players, startup innovations, and market potential for energy-efficient AI chips.
Why DDR5 DIMMs Use Two Subchannels
Explains DDR5 subchannels: splitting 64-bit DIMMs into two 32-bit subchannels so BL=16 yields 64-byte transfers matching CPU cache lines.
3D NAND Fabrication Process Overview
3D NAND fabrication: substrate prep, stacked oxide/nitride layers, channel via & slit etch, TiN/W fill, polysilicon channels and metal bitlines
ReRAM Integration Benefits in DB HiTek 130nm BCD
Weebit Nano and DB HiTek integrate ReRAM into a 130 nm BCD process for PMICs, enabling BEOL monolithic integration, lower mask count, and energy-efficient NVM.
DDR4 Signal Integrity Test Overview
Comprehensive DDR4 testing guide: scenarios, read/write waveform separation, pin functions, timing, signal integrity, ripple, tools and tips.
MySQL Architecture and SQL Optimization Guide
Technical overview of MySQL architecture and SQL optimization, covering index types (B+ tree), index creation, EXPLAIN execution plan analysis, and practical optimization tips.