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9 Types of Computer Memory and How They Work
Computer memory explained: primary vs secondary, volatile vs nonvolatile, RAM, ROM, HDDs and SSDs - uses and trade-offs.
HBM3E Boosts Bandwidth for AI Training Workloads
HBM3E boosts AI training with 9.6 Gb/s bandwidth, offering high performance and efficiency for accelerators and GPUs.
Photonic Interconnects Aim to Solve AI Memory Bottlenecks
Photonic interconnects by Celestial AI aim to solve AI memory bottlenecks with optical fabric and chiplets for enhanced bandwidth.
Comprehensive Guide to Memory Chip Technologies
Comprehensive guide to memory chips: DRAM, NAND flash, RAM vs ROM, storage hierarchy, NAND types, DRAM families, supply chain and industry models
Overview of Memory Hierarchy and Its Design Purpose
Explore the memory hierarchy in computers, its design purpose, and how it balances speed, capacity, and cost effectively.
Understanding Why DRAM Requires Refreshing
Learn why DRAM requires refreshing, its structure, and how it differs from SRAM in this detailed guide to memory technology.
HBM Technology: Principles and Advantages
HBM4 overview: principles, advantages, applications and trends in high-bandwidth memory for AI, HPC, and data centers.
DRAM Test and Inspection Design Strategies
DRAM testing and inspection challenges: wafer-level screening, DFT, high-speed interfaces, HBM multi-chip packaging, yield and reliability.
SSD Industry Classification and Supply Chain Analysis
China SSD market overview: trends, classifications, supply chain, market size, growth forecasts and competitive landscape.
SRAM Power and Performance Challenges in Advanced Nodes
Explore SRAM scaling limits, SRAM vs DRAM trade-offs, chiplet and alternative memory strategies, and architectures to meet AI memory demands.
ONFI: NAND Flash Interface Explained
Explore the ONFI standard for NAND Flash: interface specs, data rates, NV-LPDDR4 advances, signal integrity challenges and simulation techniques.
Common Memory Types and Their Applications
Guide to NAND, DDR/LPDDR, eMMC vs UFS and eMCP/uMCP: memory types, uses, performance and trends for mobile, enterprise and storage.
DMA Address-Space Copy Without CPU Intervention
Overview of DMA architecture, modes, registers, and configuration on STM32 microcontrollers, covering transfer types, channels, interrupts, and DMA controller usage.
Why DDR5 DIMMs Use Two Subchannels
Explains DDR5 subchannels: splitting 64-bit DIMMs into two 32-bit subchannels so BL=16 yields 64-byte transfers matching CPU cache lines.
DDR vs SDRAM: Functional and Structural Differences
Deep dive DDR vs SDRAM internals: block diagrams, differential clock/DQS, DLL, 2n prefetch, tDQSS, mode registers and timing differences.
3D NAND Fabrication Process Overview
3D NAND fabrication: substrate prep, stacked oxide/nitride layers, channel via & slit etch, TiN/W fill, polysilicon channels and metal bitlines
DDR4 Signal Integrity Test Overview
Comprehensive DDR4 testing guide: scenarios, read/write waveform separation, pin functions, timing, signal integrity, ripple, tools and tips.
SRAM Storage Capacity and Key Characteristics
Explore SRAM storage capacity, key characteristics, advantages, and applications like cache memory in this detailed guide.
How DMA Enables Direct Data Transfer
Learn how DMA enables direct peripheral-to-memory transfers, reducing CPU involvement in I/O on Linux and improving system efficiency.
Memory-Compute Integrated Architectures: Benefits & Types
Explore memory-compute integration: PIM/PNM/CIM advantages, industry players, startup innovations, and market potential for energy-efficient AI chips.