Memory Interface Chips for AI Servers

Technical overview of AI server interconnects and components: DGX H100 architecture, PCIe switches and Retimers, and DDR5 memory interface chip trends.

Deploy DeepSeek LLM on ELF 2 (RK3588) Development Board

Guide to converting and deploying the DeepSeek LLM on Rockchip RK3588 using RKLLM-Toolkit: environment setup, cross-compilation, model conversion and board deployment.

AI-RAN Alliance Advances AI Integration in RAN

Overview of the AI-RAN Alliance formed at MWC 2024, its goals to integrate AI into radio access networks for 5G/6G, edge AI deployment, and contrast with OpenRAN.

EASY EAI Nano-TB (RV1126B) AIoT Board Data Sheet

Technical overview of the EASY EAI Nano-TB AIoT mainboard (RV1126B): quad-core Cortex-A53, up to 3 Tops NPU, dual MIPI CSI, MIPI DSI, dual GbE, WiFi 6, USB, GPIO, Linux SDK.

AIGC basics and industry applications

Overview of AIGC and ChatGPT: technologies, industry chain, applications in text/image/video, e-commerce impact, and prompt engineering best practices.

Fourier Transform Fundamentals and Machine Learning Uses

Explains Fourier transform fundamentals, FFT use in signal processing and machine learning, and Python time-series examples for frequency-domain feature extraction.

Visualization Techniques for Machine Learning

Guide to machine learning visualization techniques covering model structure, performance plots (ROC, confusion matrix), feature importance, and practical analysis.

AI Smart Safety Helmet: Passive to Active Protection

Overview of AI smart safety helmet integrating AI vision, vital-sign and environmental sensors for real-time monitoring, alerts, positioning and intelligent management.

AI in Image Super-Resolution and Upscaling

AI super-resolution and upscaling: GPU and transfer-learning advances, training-data limits, and applications in satellite, medical, gaming, and video-conferencing.

Training Large Models Across 10,000+ GPUs

MegaScale system for large-scale LLM training beyond 10,000 GPUs, detailing algorithm-system co-design, communication and network tuning, MFU improvements, and fault-tolerant recovery.